NSF Sponsored Workshop on Structured Design Methods for MEMS
Synthesis of MEMS
In recent years, computer-aided design tools for the synthesis
of VLSI integrated circuits have been a topic of research and development.
Synthesis strives to proceed from a high-level behavioral or
structural description of a VLSI system down to low-level mask
geometry. The various VLSI synthesis levels build upon the
mask geometry layout editors that are the designer's interface
to the fabrication process.
Arguably, "structured-custom" synthesis paradigms in digital VLSI
(hybrid gate arrays, standard cells, chip assembly, parameterizable cores)
prototyping methodologies (field programmable logic and interconnect
devices) are "success stories".
There has been greater progress in synthesis tools for digital VLSI systems
than for analog VLSI systems. The analogy of microelectromechanical
systems (MEMS) to analog VLSI may be more appropriate
than an analogy to digital VLSI.
papers at the May 1994 NSF New Paradigms for Manufacturing
noted the limits of the analogy between VLSI systems and mechanical systems,
particularly with respect to the design process, and implicitly with
respect to the prospects for developing "synthesis" tools for mechanical
Our own general session and breakout discussions, while
specific to microelectromechanical systems, have recapitulated
the general findings of previous workshop attendees:
Recent research in MEMS has focused on inertial sensors,
micro-optics, micro-robots for assembly, and micro-manipulation.
The richness of possible applications, and the complexity of
contemplated systems (e.g., micro-robots), suggest a great deal of
potential for synthesis technology for MEMS.
Analogous to the situation
in VLSI, synthesis tools for MEMS must operate on several views of the
- VLSI has a "complete basis" (the NOR gate), while MEMS does not;
- VLSI has a "clean separation" between function/design and
fabrication/process, while MEMS does not;
- VLSI has mathematical constructs
(Boolean algebra, correct-by-construction synthesis, etc.),
while MEMS does not, and
- VLSI operates on (digital) information and has no moving parts,
while MEMS operates in multiple coupled energy domains and has
- from desired 3-D geometry (device cross-sections) to process and
- from electro-mechanical circuit to component
geometry specification; and
- from high-level, functional description of the hardware to
electro-mechanical circuit specification.
Overview of VLSI Synthesis
Synthesis, in the VLSI context, connotes "something other than custom or
hand-crafted". Today, elements of the VLSI synthesis process contain
a number of different design levels and a collection of CAD tools
to convert from level to level.
At the highest level are Hardware Description Languages (HDL).
These languages can include a behavioral and/or functional description
of the system.
The various hierarchical levels of abstraction correlate well with stages in
a standard "design flow".
From the HDL, a synthesis system would contain a CAD tool
with algorithms which can apply transformations to produce
an intermediate design representation.
This intermediate design representation may be
at the control-data flow graph or Boolean network levels.
Another CAD tool may then input the control-data flow graph
and search for area and time design trade-offs within the space of feasible
(i.e., correct) designs. This design trade-off analysis tool
would output a revised list of hardware resources and a control "schedule"
in a structure description language format.
At the next lower level,
algorithms which map the revised intermediate design representation
to a library of component "macros" (RTL-level blocks, standard-cell, etc.),
would be invoked. This process is
essentially performed via a covering formulation.
At the lowest level, there will be
algorithms which embed the physical design and its connection topology
onto silicon resources. A number of reasonably well-established
CAD tools will handle
the placement and routing tasks and produce a final CIF or GDS II
mask geometry file if the design is to be produced via a
typical CMOS process.
Issues for MEMS Synthesis
From the above discussion of a typical VLSI synthesis system,
a number of similarities and differences exist when trying
to propose a synthesis systems for MEMS. These include:
Mechanical coupling and multi-functional structure complicate the
physical embedding task. "Back-loading effects" and a host of
constraints, along with a possibly richer notion of "component library"
that spans parameterized generators and multiple fabrication processes,
complicate the technology mapping task. Fundamental research must
- new means of representing/parameterizing the design space
(e.g., at the "circuit" and "component" levels),
- new means of abstracting optimizable objectives from the
design description, the
design constraints, the "netlist" of selected components, etc., and
- new means of performing constrained/heuristic optimization and
The semantics of interface specifications for components requires
development (e.g., semantics of a component structure in terms of
required adjacency to X, shielding property for Y, barrier for flow of Z,
There is a need for engines and
algorithms that can reason about the increased complexity
and variety of interconnections that are possible in MEMS systems.
Parameterized component libraries and library generators require
For example, generalized semantics for terminal locations, internal (to the
component) connections, process technologies, technology scaling, drawn
and process dimensions, various performance parameters (time constants,
etc.) need to be defined and standardized.
There are differences in mapping geometry to process and mask
for MEMS as opposed to VLSI.
In VLSI, designs can be reduced to a simple set of library logic
cells, such as NAND and NOR. A basic cell library simplifies
In MEMS, it is more difficult to propose
a basis set, from which one can combine into a large
class of systems.
An interesting long-term goal would be the development of a
"complete" or "admissible" search and optimization methodology for
"optimal design". Possible directions include a generalized theory of
transduction, or the notion of a fundamental building block for MEMS
(e.g., a Cartesian block with inertia, damping, spring constant,
coefficient of thermal expansion, etc.).
Findings and Recommendations
Synthesis is complementary to analysis which includes
the tasks of extraction and simulation.
Accompanying each step from a given level to the next higher
level is an extraction, whereby the output of analysis at
one level can be used for analysis at the next higher level.
It is important to have sufficient analysis tools
so that goals such as the following can be met successfully:
The following summary lists suggested directions and motivations for several
broad levels at which synthesis for MEMS should be developed.
To organize the findings and recommendations, Table 1
shows the different "levels" of MEMS design.
The synthesis process involves traversing this figure from the top
system level down to the bottom process-mask level.
Conversely, analysis involves traversing this figure from the bottom up.
Each of the subsections below relates to the tasks
needed to proceed from one level of the table to the next level
- top-down design from
a functional or other high-level specification, or
- iterative design
that includes semi-automatic exploration of the design space and
achieves short design cycles.
Table 1: Goals for Synthesis Research
from System Issues down to Process and Mask.
Synthesis Proceeds Downward while
Analysis Proceeds Upward.
|Synthesis Level||3 Year goal||10-Year goal
|SYSTEM || Lang. requirements || HDL language
|Model including (dynamics)
|| HDL to schematic synthesis
|| Formal design and verification methods
| Diagnostic structures
|| Resource allocation
| Packaging, assembly and identification
|| 2D mech-electrical
|| Chemical, magnetic fluidic and thermal
| Library: actuator, spring, mass, damper elements
|| Other domains
| Place & route cues
| Shape synthesis
|| Tool prototype
|| 3D shape generator
|Physical shape (structure)
|| 2D shape generator (homogenization)
|| Yield/cost analysis tools
| Layout generator with component library for fixed processes
|| Process variation compensation tools
| Process compiler (MISTIC)
|| Implement & distribute process compiler such as Tanner, CaMEL
|PROCESS | MASK
|| Extensions to bulk micromachining mask/layout
|| Assembly sequence synthesis
| Develop process library technology file
| DRC & extraction for specific processes
- Finding: MEMS Hardware description language.
At present, a HDL for MEMS is not available.
Several characteristics of a potential language were considered.
For example, the HDL may have a "C" language or MATLAB style
syntax. The language syntax should help to facilitate the mapping
onto the building blocks in the MEMS cell library.
Define a MEMS Hardware Description Language.
- Develop a Language Requirements Manual (LRM) and perhaps a draft
- Incorporate a description of multiple energy domains, transduction, and
packaging into the HDL. Describe the physical/spatial relationships
Investigate the applicability of VHDL-A, (analog extension to VHDL).
Provide information on MEMS needs and requirements
(e.g., distributed /non-lumped systems, or thermal expansion)
to the committee developing the VHDL-A specification.
- Proceed with HDL Language standardization and encourage widespread use.
- Finding: HDL to "Multi-domain Schematic".
Automated synthesis from HDL is currently not available.
The problem of synthesis can be further divided into synthesis of systems
and synthesis of custom components. The
high level description of a system can be used to assemble the system
from a library of existing components. However, the
library may not have the necessary components for all systems.
Thus it is also necessary
to synthesize custom components from a functionality
specification. This can be accomplished by determining the device
topology needed, then scaling the dimensions appropriately and if necessary
extracting the process required to fabricate it. Synthesis is necessary
because the bottom up approach takes too long to design.
For the system designer, the goal of synthesis
is not necessarily designing the optimum device but is
rapid prototyping and "design reuse" through component libraries.
For the custom component designer, the goal is maximum performance.
These two goals may lead to different synthesis pathways.
- Define schematic symbols, interfaces and connection
rules for MEMS components.
The near term focus is on planar technology, and on thermal,
solid mechanical, and electrical domains. [3-years]
- Develop an HDL-MEMS-to-schematic translator. This tool would provide
a graphical interface to the MEMS schematic symbols (analogous
to a VLSI schematic capture tool). [3-years]
- Study the Bond-Graph representation, which is based on power flow.
This representation provides a framework for systems involving
several energy domains.
It not only provides a common representation for all elements
belonging to different energy domains, it also permits couplings
among different domains.
It works on the principle that elements/subsystems of every
domain can be broken into three types of common elements such as
storage elements, dissipators, and energy sources/sinks.
There are system level simulators that read a bond-graph representation
and simulate the behavior of the system (e.g.,
CAMAS from the University
of Twente, Netherlands and ENPORT from Michigan State University).
Determine how well related electronic elements fit the
bond-graph representation, that is, how well can we describe
the electronic elements (e.g., transistor, Op-Amp) in terms of
storage-dissipator models. Explore the
bond-graph approach as a means to obtain a system level description
language integrating mechanical and electrical components. [3-years]
- Formal verification and "correct-by-construction" design
- Develop tools for MEMS "signal" flowgraph generation, scheduling
algorithms (parallel/serial, area time trade-offs), and automatic
resource allocation (number of components).
Develop tools with knowledge of constraints on signals,
and binding of resources (operations to components).
These tools would be analogous to similar steps
in VLSI high-level synthesis. [10-years]
- Provide support tools for packaging and assembly, analogous to
tools for VLSI padframe generation. [10-years]
- Finding: "Multi-domain Schematic" to 3-D Shapes.
In a "strawhorse" example, the input is a multi-domain
schematic. For example, consider the design of a
resonator composed of a spring and
a mass, shown photographically in
(Photograph of a MEMS Resonator.)
and schematically in
(MEMS Resonator Schematic.).
The system has intrinsic damping and is driven by an
electrostatic or electrothermal actuator.
The terminals can have associated vectors of energy domains, or be specific
to a particular energy domain. Design tools would then generate
Tanner Research Tools and MCNC's CaMEL efforts are
the current state of the art in terms of parameterized layout generators.
Determine the shape of the component from the desired behavior. Use techniques
like homogenization (3-10 years) at the electromechanical circuit
level. The motivators include: design re-use, formalized repository or
mechanism for reproduction of design know-how. Complications include:
mechanical coupling, multiple interacting energy domains, etc.
- Develop a multi-domain schematic representation
which includes actuators, springs, masses and dampers.
Develop extended semantics (cf. the observations of
"multi-functionality" in earlier workshops).
For example, a link in VLSI denotes electrical connectivity, but often
(e.g., at the place-and-route level) does not even have associated
information giving the direction of signal flow. In contrast, a link for
MEMS might denote impermeability to a fluid, heat conduction path, rigid
(straight-line shape) mechanical coupling, etc.
One approach might incorporate a generalized vector of potentials
temperature, force, electrostatic potential, pressure).
Interconnection links would then
have semantics that included flow-like quantities (e.g., heat,
displacement, current, fluid). This would offer the possibility of
straightforward paths to simulation tools like SPICE. [5-years]
- Develop prototype tools for the following:
- Develop shape generation: For example, given a mass and spring
constant, generate a flexure, support structure, etc.
- Develop "Search mechanisms" for extracting library elements.
- Develop place and route tools to complete the schematic.
Place and route is essentially an optimization step.
The problem is one of physical embedding under tremendous
constraints. Both the technology mapping and the physical layout will
require significant departure from current VLSI approaches. There will
typically be a very discontinuous "feasible region" for the design, and
steps in the flow may actually be quite iterative. Technology mapping,
parameterized component generation, place-and-route might together
constitute a loop. [3-years]
- Integrate yield, sensitivity analysis (to process variations), and
cost issues into process synthesis. [10-years]
- Finding: Shape to Process Flow/Mask Geometry.
If the process is fixed, then process data and choice of generator from
a generator library can also yield mask data for a component. This is
the Tanner and CaMEL approach. For CaMEL, there is a generator utility
that accesses a generic library of electro-mechanical elements including
actuators, gears, simple hinges and accelerometers. The non-parameterized
elements are generated using PERL scripts and the parameterized elements
are created using compiled programs. There are more non-parameterized
elements than parameterized elements. Tanner has developed an
applications-level interface to their design database and user-interface
capabilities, which can be used to develop parameterized component
layouts. Currently a C-language interface is supported. The benefit of
the Tanner approach is the wide acceptance of C and the L-Edit program.
Tools that automatically synthesize process flows from cross-sectional
specifications are needed for "custom" device synthesis. Generators
must output "design rule correct" (i.e., feasible with respect to
Existing tools from Univ. of Michigan (MISTIC)
have made good progress to this end for surface-micromachining.
Complementary work in mask layout
synthesis for bulk micro-machined structures should be encouraged.
Process perhaps should not be so intimately coupled to function and
design. It is possible that more designs are "reachable" via a
technology-specific suite of synthesis and exploration tools than are
reachable via the current approach (within which process design
essentially follows from function). The task of building a significant
component library for a particular identified process can spur development of
- Develop a full implementation of current research software for thin
films, for example the MISTIC-type approach. Then extend
the implementation to bulk micromachining
(analogous mask layout capability for bulk-micromachining) and 3D.
Develop library generation tools (correct for any given process).
Efficient search over the solution space is critical. Disseminate tools
to all users. Reduce algorithm complexity of the implementation. [3-years]
Both types of generators should be integrated into general purpose
layout tools. Continue to develop the CaMEL library. Generate simulation
models linked to layout generation. [3-years]
- Understand use of time etching for component shaping. This is an
inverse of recent anisotropic etching simulation work. [3-years]
- Define and develop technology files for standard processes. [3-years]
- Develop libraries which are correct-by-construction for any given
process. For fixed processes, process data and choice of generator from
a generator library can also yield mask data for a component. Develop
design rules and design rule checking (DRC) capabilities.
Generators must output "design rule correct"
(i.e., feasible with respect to process) instances. Emphasize
"design reuse." [3-years]
- Investigate assembly sequence, and reliability issues. [10-years]
- Finding: Synthesis from Performance to Mask Geometry.
This process essentially skips the 3D geometrical view.
is exploring this approach.
The CaMEL and Tanner systems
can generate geometries from physical parameters, but these
tools do not include evaluations or simulations of performance.
- Develop performance driven layout generation. Generate layout from
these three data inputs: material/process data (from handbook, FEA,
measurements, Technology File), libraries of parameterized cells (and
cell generators) and performance specifications. [3-years]
- Promote research to understand process flows -- including time etches
-- with respect to the layer structures. Demonstrate component
- Demonstrate synthesis of smoothly varying structures and even further
with the LIGA technology. [10-years]
Despite the differences between digital VLSI and MEMS, sufficient parallels
exist to recommend a program of research to develop (semi-)automated
methods for synthesizing at least some classes of MEMS devices. The
differences between digital VLSI and MEMS strongly suggest that structured
MEMS synthesis methods will not be a direct outgrowth of VLSI methods,
however, many of the underlying constructs (e.g., language, modeling,
simulation, etc.) should be similar in philosophy, and appear likely
to serve as guides for initial research in this area.
VHDL-A appears to be an appropriate starting place for synthesis
language-related research. The development of libraries of previously
successful designs is also important, but can proceed (at best)
in parallel with synthesis language development.
Approaches to transforming a description (perhaps of the function)
of a desired device into a description of the physical device
(including translation-like methods as well as search methods)
have a great deal of promise for synthesis of MEMS devices,
and research in this area should be encouraged.
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