NSF Sponsored Workshop on Structured Design Methods for MEMS

Structured Design Methods for MEMS: Essential Tools for Rapid MEMS Development


C. H. Mastrangelo
Center for Integrated Sensors and Circuits
Department of Electrical Engineering and Computer Science
University of Michigan, Ann Arbor
Room 1243
EECS Bldg.
Ann Arbor, MI 48109-2122, USA
carlosm@eecs.umich.edu

Introduction

Currently there are few or no structured design methods for MEMS at any level of abstraction. These levels include (a) MEM device simulation, (b) functional modeling for system simulation, (c) physical representation formats, and (d) process description specification. Historically, CAD tools for MEMS design have not been implemented until recently [1], [2], [3], [4], [5] on just a few of these areas. Therefore many MEMS designs have been developed by hand calculations, with at best a combination of existent tools developed for other older fields. In order to understand the MEMS designer task, and the possible identification of parts that can be aided by structured methods, it is instructive to describe a typical design cycle (Figure 1 (Typical MEMS design cycle (bottom-up).)).

The design cycle for a MEMS device consists of several phases. The first phase involves the identification of the structural element needed (this itself is an ad-hoc process) followed by hand calculation analysis and first first order estimation of dimensions. In the second phase, the designer must create a realistic process flow for the desired device. He may be able to fit his design in a foundry-available process but, in general, depending on the nature and complexity of his design, the designer must resort to a custom process. During the process construction, the designer must be familiar with processing details such as material incompatibilities, layer etchants, and good, stable, and stress free thin-film materials appropriate for his design. This is undoubtedly a task that requires a great deal of process knowledge, and it is a major time consuming step of the design cycle phase.

Along with the process, a mask set must be generated to form the desired device under the process. This is most frequently accomplished using a conventional layout editor for VLSI. There are typically no guidelines available regarding design rules of any kind, with the exception of a few rules of thumb used to avoid problems related to the undesirable effects of undercut and stringers. In this stage it is typical to borrow some of the process CAD tools developed for semiconductor processing (such as SUPREM) which help determine the shape assumed by diffused and reactively grown layers. These, however do not provide much information regarding stress effects which ultimately may lead to device failure.

In the third phase, a good designer will construct a solid model of the actual micromachined structure and run a simulation on a conventional FEM system such as ANSYS. If the behavior of the device is somewhat satisfactory, he can always "optimize" its performance by adjusting some of the physical parameters such as mask features or thicknesses adjustments. Much of the design work discussed so far is trial-and-error. That is, if the simulations do not behave properly, the whole process must be restarted!

In passive MEMS devices, this may represent the end of the design cycle. However, in the construction of systems, the thin film structure must interact with electrical signals in a predetermined fashion. For example in a capacitive pressure sensor, the diaphragm deformation must be converted to a capacitance change. Similarly, actuators driven by electrical forces must have a characteristic transfer function. Whenever the device is connected to a circuit and feedback is present, the dynamics of the MEM device are interlinked with that of the circuit which, unless properly accounted for, can yield incorrect signal levels or, to an extreme, oscillatory behavior. To date whenever this situation is encountered, MEMS designers resort to simplified mechanical models (typically one or two pole approximations) of the distributed device dynamics. The link between the mechanical and electrical world is established through equivalent electrical models representing the mechanical variables of the system. This is in general possible because of the generality of Kirchoff's laws.

For example, temperature and pressure can be represented by voltages while heat flux and mass flow rate can be represented by branch currents. In a practical implementation these electrical equivalents are implemented within a circuit simulator such as SPICE or SABER. The construction of distributed models for these is also possible through suitable discretization and generation of equivalent network, but this process is at best tedious. From the discussion above, it is evident that the design cycle involves many steps. Therefore structured design has the most impact only if a comprehensive design system or tool set is available. It is important to develop a system that can provide automatic design support at all stages of the cycle leading to rapid prototyping of MEMS.

Applications of Structured Methods

In order to facilitate the designer task many of these phases can be highly structured. In the simplest form, structured methods may develop in the form of standardized representation languages, such as CIF, GDS, and other layout languages are to VLSI devices. The formal definition of these representations must account not only for the mask layout but also for the depth of its layers. This is necessary as in general the device process will not be universal, and the individual layer thicknesses are crucial to the mechanical properties of the device. Furthermore such representation is very useful to perform design rule checks and to pinpoint potential process problems associated with the layer order and thicknesses.

At a higher level lay device simulation tools. These tools must be able to couple interactions between variables of different types. For example in actuators, the simulator must solve electromagnetic field coupled with mechanical deformation of the electrodes simultaneously [1], [3]. While accounting for all possible interactions across a large number of signal domains seems a formidable task, recent efforts in Europe suggest that a unified field theory of interactions can be achieved through generalized thermodynamical state equations [7]. This approach seems quite attractive since all properties of a domain are the result of energy exchanges and transport effects. Another approach currently assumed is the solution of independent decoupled problems with self-consistent boundary conditions.

Micromechanical process simulation tools are needed to model not only the physical and electrical behavior of thin films during processing but also the mechanical properties of the films themselves. For example, many of the layers used in these devices contain substantial levels of stress. This stress and the ultimate mechanical properties are functions of specific deposition conditions and subsequent thermal history. It is extremely useful to keep track of the "mechanical state" of the layers during the process in order to assure that the device layers will maintain mechanical integrity resulting in proper device operation.

Once appropriate numerical models for the device behavior are found, it is necessary to devise simplified component macromodel behavioral models to be coupled with systems. For example, portable modular component models generated from the simulation analysis are very useful if they are easily incorporated into circuit simulators. In fact, this is extremely important to accurately model the microstructure dynamics when connected to a circuit, and it is an essential tool needed for the implementation and simulation of systems. Recent activities in Europe are leading to the establishment of a hardware description language (VHDL-A) for MEMS similar to the well known VHDL language used in logic chips.

In order to perform all of these functions, each of these tools must be connected easily to each other. This can be accomplished through a series of translation tools between several standard description languages. For example, SIF may be used for physical layout while VHDL-A for behavioral, etc.

Top Down and Bottom Up Approach

While all of these tools are undoubtedly useful for speeding up a MEMS design cycle, the ultimate goal of the designer is to develop a MEMS structure that performs a specific function meeting desired specifications. The tools described above work on an "open loop" or "bottom up" mode. That is if the device does not meet the design criteria, the designer must make appropriate changes and repeat the cycle. If the device is complex, this process requires many iterations. The bottom-up approach thus demands an intense number of simulations per device developed, and it is indeed quite tedious.

It is highly desirable to develop a tool the automatically design the device starting from its specification. Compilation or "top down" tools do just that. In VLSI technology silicon compilers can design entire chips. In MEMS, the requirements of such system are different, and this function may be performed at different stages in the design cycle in order to avoid tedious manual iterations (Figure 2 (Top-down automatic design approach.)).

To date, it is unclear how a particular structure must look like to perform a given function, and as a result, the choice of device topology is dependent on the designer skill. In order to minimize the device complexity, it is very desirable to develop theoretical methods that essentially determine the number of device layers required to perform a given function. To date these methods do not exist, but research efforts are underway using a generalization of ideas borrowed from the well developed theory of mechanisms.

One of the areas that benefits the most from the top-down approach is that of process design. Since many MEMS devices require custom processes, their design inherently requires a broad spectrum of micro fabrication processing knowledge. This knowledge requires years of experience to acquire; therefore it is very desirable to develop a software tool that directly creates a process flow starting from a geometrical description of the device. Such tool has been already developed [4]. The methods utilized rely on a mathematical representation of the sequential fabrication process and the final device structure. The key element in the generation of a process flow resides on the order between the constitutive device layers. The device layer order can be represented in most cases by a directed acyclic graph in the form of an adjacency matrix. Further processing constraints can be easily incorporated as additional restrictions in the matrix; thus representing a compact means for the specification of good process design practices. Choices of etchants and deposition recipes are chosen from an internal database of lab-dependent and general data. The process flow is essentially constructed as an expansion of a topological sort of the graph nodes. Such procedure has satisfactorily assembled entire process flows for merged micromachining-MOS devices as well as complex 20-mask BiCMOS processes. Along with process compilation tools comes the development of a process language. This is in fact an essential need for communication with a foundry service facility, and the possibility of starting runs remotely on demand at the foundry.

Dimensional optimization [2] also plays an important role in the top-down approach. The behavior of distributed electromechanical elements can be tuned by proper adjustments of its dimensions. This can be performed automatically in order to meet the desired performance specifications. There are currently two approaches in this area. In the first, the behavior of each MEM unit element can be parameterized and stored as part of a library. Actual dimensional parameters can be determined through numerical optimization of nonlinear constitutive relations. In the second approach, the actual shape of the element can be determined to meet specifications. This approach, known as homogenization [6], is very attractive since it can yield electromechanical systems with simpler process flows and therefore a lower cost.

Summary

There are few or no existent structured design methods and CAD tools for helping researchers develop MEMS devices. The development of standard device representations, cross-field simulators, material property process simulators, and behavioral macromodels can shorten the design cycle substantially. The development of top-down compilation tools is the ultimate goal resulting in a "device-on-demand" technology with extremely short design cycles. While the development of any of these will shorten the design cycle for MEMS, their overall impact can be accomplished through the realization of a complete design system with few or no intermediate manual steps.

References

  1. S. D. Senturia, "CAD for Microelectromechanical Systems", invited talk at Transducer's 95. June 25-29, 1995, Stockholm, Sweden. Vol 2, Paper No. 232-A7.
  2. R. A. Buser and S. B. Crary, "Integration of the Anisotropic Silicon Etching Program ASEP within the CAEMEMS CAD/CAE Framework", in MEMS'92, 1992, pp. 133-138.
  3. H. U. Scharzenbach et. al., "A Microelectromechanical CAD Extension to SESES", J. Micromechanics Microengineering, 3, 1993, pp. 118-122.
  4. M. Hasanuzzaman and C. H. Mastrangelo, "MISTIC 1.1: A Process Compiler for Micromachined Devices", in Transducer's 95, June 25-29, 1995, Stockholm, Vol. 1, Paper No. 38-A4.
  5. IntelliFab and IntelliCAD, IntelliSense Corporation.
  6. M. P. Bendsoe and N. Kikuchi, "Generating Optimal Topologies in Structural Design using a Homogenization Method", Computer Methods in Applied Mechanics and Engineering, 71 (1988), pp. 197-224.
  7. D. C. Van Duyn, "Multi Signal-Domain Modelling of Solid-State Transducers: A Theoretical Framework Based on Irreversible Thermodynamics, Mixed Finite Elements and Multigrid", Ph.D. Dissertation, Delft University. The Netherlands, 1993.

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